Place and Route Software Engineer

Santa Clara, CA

Design and develop timing-driven Place & Route and Physical Optimization software for Silvaco’s Spider product.

Must have:

• MSEE or PhD in EE
• Minimum 5 years of hands-on experience in designing and developing ASIC Place and Route and/or Physical Synthesis
• Knowledge of timing-driven P&R methods, algorithms and data structures
• Knowledge of Verilog, LEF, DEF, GDS, DSPF, SDF, SDC and Liberty formats
• Proficiency in C++ on Linux
• Experience in floorplan management, wire estimation, Clock Tree Synthesis, ANTENNA avoidance, NOISE/SI avoidance, Static Timing Analysis (STA)

Please quote ref. SW-PNR-CA when applying

By Email

jobs@silvaco.com